OVERVIEW
TRUESILICON IP DATASHEET The Truesilicon AXI Expander Block is a configurable IP designed for AXIbased systems where the data width of the Master Interface (MI) is smaller than that of the Slave Interface (SI). Its primary function is to perform data width up-conversion, enabling seamless communication between components operating on different bus widths, while maintaining full compliance with the AMBA AXI4 protocol specifications. 

The AXI Expander Block samples the request from the Master Interface, adjusts the relevant AXI attributes which ensures that the valid data portion is placed correctly on the wider bus, with inactive bytes zeropadded, while keeping all AXI handshakes and timing relationships intact.

The AXI Expander also supports a packetisation mode, where incoming Data from the Master Interface is accumulated and packed across multiple transfers until it matches the data width of the Slave Interface. Instead of zero-padding the unused bytes, this mode efficiently utilizes the bus by forming a complete-width data packet before transmission to
the Slave Interface, thereby improving bus utilization.

Upon receiving responses from the Slave Interface, the Expander
reconstructs the data to match the smaller data width of the Master
Interface before forwarding it, ensuring transparent and protocolcompliant
data transfer across the interfaces.