The AXI Splitter is a configurable IP designed to enable seamless data width conversion in AMBA AXI-based systems. It is primarily used when a wide data interface must communicate with a narrower interface, ensuring protocol compliance while maintaining optimal throughput.

The splitter operates by dividing a single wide AXI data beat into multiple narrower beats based on Slave Interface (SI) data width, Master Interface (MI) data width, and transaction size (AxSIZE). It dynamically recalculates and adjusts AXI transaction attributes such as address alignment, burst length, burst type, and write strobes.

When the transfer size exceeds the MI data width, the splitter performs beat-level splitting and burst restructuring.

The block supports all AXI burst types (FIXED, INCR, WRAP) and converts or splits bursts to ensure compliance with AXI protocol constraints such as maximum burst length and alignment rules. Complex cases such as unaligned WRAP bursts are handled through controlled transformation into multiple INCR bursts where required.

To improve performance and flexibility, optional buffering can be enabled for both control and data paths. Buffer depths are configurable based on system requirements and interface widths, allowing designers to optimize for latency, throughput, or area.

The AXI Splitter is provided as synthesizable RTL and can be easily integrated into AXI-based interconnects and SoCs, helping manage different data width interfaces efficiently.